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TwinMOS Introducing DDR2 SDRAM is a Double Data Rate Synchronous Dynamic Random Access Memory interface. DDR2 allows higher bus speed and requires lower power by running the internal clock at half the speed of the data bus. the DDR2 at 1.8V can effectively save about 50% energy when compared with the DDR module consuming 2.5V working at the same frequency.


240 edge connector pads
Data Rate 667 MHz
SSTL-18 interface 1.8 Voltage +/- 0.1V
Package FBGA


Specifications:

  • JEDEC Standard
  • Bandwidth(max): 5.3GB/s
  • Date Rate: 667MHz
  • Double Data Rate architecture
  • Differential Data Strobe (DQS)
  • Differential clock inputs (CK and /CK)
  • MRS cycle with address key programs

  • * CAS latency: 3, 4& 5
    * Burst length: 4 & 8
    * Burst type: Sequential & Interleave
  • 2 variations of refresh

  • *Auto refresh & Self refresh
  • Edge aligned data output, center aligned data input
  • 2 banks to be operated simultaneously or independently
  • Serial Presence Detect with EEPROM



2GB DDR2 667MHz DIMM_Retail .jpg
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